Product Overview
Designers reduce board layout and placement time from weeks-to-minutes through CircuitSpace's patented AutoClustering™ technology, intelligent design (IP) reuse, and replication. Reductions in PCB design time have a direct impact on time-to-market for new products, which directly correlates to profitability
CircuitSpace implements a hierarchical approach to printed circuit board design through enhanced Autoclustering™ and replication technologies. CircuitSpace also expedites the design process through the use of template generation for global library usage across divisions, template usage with and without etch, automated layout reference designator propagation and automated change report between layout designs.
CircuitSpace with the Cross-Probing technology allows the user to have bi-directional communication between layout and a (PDF) schematic. The new technology works seamlessly within Cadence’s Allegro and the Allegro Viewer environment, and gives both Designers and Engineers instant selection and verification of design elements such as components, nets, or pins, within Cadence Allegro and the (PDF) schematic.
The combined solution provides PCB Designers, hardware engineers, test engineers and manufacturing engineers a valued mechanism for design, review, verification and test.
Key Benefits
- Improves communication between EE and Layout Designers
- Shortens design cycle timeline by weeks
- Works seamlessly within existing design methodologies
Featured Capabilities
AutoClustering - View Demo
Creates clusters, functional groups of components, based on the design
information:
- By Schematic - Support for CIS, HDL and DxDesigner
- By ROOM - Property previously assigned
New clusters are drawn above the board. Clusters with a FIXED part are
placed around the FIXED part. Addenda clusters are children clusters
for an existing cluster. Parent property auto-assigned, which
identifies the parent cluster. (read more about auto clustering)
Autogenerates clusters based on design information
Cross-Probing
Cross-Probing allows the user to have bi-directional communication between layout and a (PDF) schematic. The new technology works seamlessly within Cadence’s Allegro environment, and gives both Designers and Engineers instant selection and verification of design elements such as components, nets, or pins, within Cadence Allegro and the (PDF) schematic.
Replicate Cluster - View Demo
Creates as many replicas of the source clusters net topology from the available
parts in scope.
All resulting instances that exactly match the source are assigned the template tag of the source cluster.
All resulting instances that partially match the source are assigned a synchronization tag.
Creates replicas of a cluster's net topology
Modify Placement and Propagate - View Demo
Instantiates source cluster's placement and cluster shape changes to targets. Placement Changes that may be propagated are:
Component:
- X-Y locations
- Angle of rotation
- Side (Top / Bottom)
RefDes text:
- X-Y location
- Angle of rotation
- Size
- Layer:
- Silkscreen Top / Bottom
- Assembly Top / Bottom
- Display Top / Bottom
Reference Designator Propagation - View Demo
CircuitSpace will propagate a source clusters reference designator text
locations to target clusters.
Text that can be propagated are on the RefDes layers:
- Silkscreen_Top
- Silkscreen_Bottom
- Assembly_Top
- Assembly_Bottom
- Display_Top
- Display_Bottom
Source cluster reference designator locations to target
Checkpoint Compare Report
Save a design checkpoint at anytime and compare it against other checkpoints.
(ie. Compare old netlist to new netlist)
Compare Summary and Detailed tables for:
- Components - total, added, deleted, modified pkg, dev, cluster, x-y
- Nets - Total, Added, Deleted, Modified; Added and Deleted pins
- Clusters - Total, Added, Deleted, Modified Master, Added Members, Deleted Members, Modified Members
The report format can either be html or .csv
Modify Cluster Membership - View Demo
A way for the user a to change the existing membership of a cluster and if
chosen, propagate that change to other clusters.
- Revise and Propagate - The membership and placement changes to specified target clusters
- Edit Membership - Changes the source cluster's component membership. Changes are not propagated
- Edit Etch - Changes the source cluster's etch membership Etch can be added and/or removed.
Changes a cluster's existing membership and propagates the change to selected clusters
Define Cluster/Save Template
Define Cluster creates a cluster from a group of components the user specifies.
When defining a cluster the user can select components in the
Allegro Edit Window (Manually), or you can prepare a file listing the
cluster members (From File).
Save Template writes a template for the selected cluster.
A template is a file containing a cluster's membership, the net
topology, and the components relative placement information. If the
selected cluster has etch, vias and/or areafills, it is saved as part
of the template.
Apply Template(s) - View Demo
Applies one or more templates to the current design. This command
creates as many new clusters for the selected templates as possible
from the available components in scope. Clusters instantiated from the
same template have the same components, master part, and the same
relative placement for each component. The new clusters, both exact and
partial matches, are assigned the template’s membership and placement
tags. Allowing for future propagation of ECO changes.
Creates replicas from a disk saved source
Apply Template Etch - View Demo
Instantiates etch from a template to the selected cluster.
Three levels of etch may be applied:
- Fanout - Etch from a components surface mount pin to the first via.
- In-Cluster - Etch and vias connecting any two cluster components member pins, inclusive of fanout
- All - Etch, vias, and areafills that are on a net connected to at least one pin of a member part in the cluster. Etch that exits the cluster boundary is clipped at its intersection.


